A New Approach to Fourth-Order Quadrature Signal Generation for a Fast and Noise-Free PLL Output Under Non-Ideal Grid Voltage Conditions

Dual quadrature signal generator (QSG) along with a positive sequence calculator (PSC) eliminates the negative components from unbalanced grid voltages. The QSGs also offer attenuation to harmonics and dc-offset present in sensed input Fourth-order superior harmonic complete rejection compared lower-order QSGs. Therefore, dual fourth-order QSG + PSC is an apt solution for pre-filtering phase-locked loops (PLLs) under non-ideal voltage conditions. Two (FO-QSGs) namely, second-order SOGI-QSG (SO-SOGI-QSG) cascaded have been proposed literature. Parameter selection these FO-QSGs achieve faster dynamic response challenging due higher order of transfer functions. time directly impact PLL. This paper proposes new approach generation that achieves lower settling existing FO-QSGs. method by setting parameters using equations relate system time. Using method, settles within 25.4 ms while maintaining low total distortion.